Bangalore,  August 26, 2018: Global leaders of the semiconductor industry,  SiFive and Open-Silicon, hosted Bangalore’s first RISC-V Tech Symposium this week.
RISC-V, an open instruction set architecture preferred by leading system, chip design organizations, several start-ups and governments around the world.
The tech symposium in Bangalore enabled industry experts, students and engineers to share their thoughts on the future of RISC-V, Indian semiconductor industry, startups, AI and Deep Learning among others.
The  speakers used the platform to discuss the nuances of standardization of RISC-V ISA for all computing devices. They also provided impetus on AI as the next revolution in digital world, innovation for a data centric world, high bandwidth memory IP subsystem and RISC- V as a game changer for startups.
The event was attended by industry leaders and dignitaries such as, Krishnakumar Ramamoorthi, Sr. Staff Product Marketing, Microsemi, Vivek Tyagi, Director, Western Digital, Chandan Haldar, CEO, Morphing Machines, Kunal Ghosh, Director & Co-Founder, VSD and Anagha Ghosh, Business Head & Co-Founder, VSD along with Dr. Krste Asanovic, Chairman of RISC-V Foundation and Co-Founder and Chief Architect of SiFive,  Sunil Shenoy, VP of Hardware Engineering, SiFive, Bhupesh Dasila, Engineering Manager, Open-Silicon and Shafy Eltoukhy, SVP and General Manager, Open-Silicon.

SiFive also announced first of its kind Design Contest in India. SiFive will collaborate with the best ideas and provide the winners’ access to custom CPU IP, design support, and help delivering working samples for the chip. The contest will run till  November 30 2018.
SiFive is the first fabless provider of customized semiconductors based on the open RISC-V instruction set architecture. The SiFive SaaS-based platform enables fast access to custom RISC-V IP cores, subsystems and robust design platforms. SiFive democratizes access to custom silicon by helping system
Open-Silicon is a semiconductor solutions company founded in 2003 to provide traditional ASIC design, derivative and platform custom SoCs, and deliver fully tested silicon and platforms