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Altera's India Country Manager Gangatharan Gopal, at the media briefing on the company's new Cyclone IV family launch in Bangalore, Nov. 3 ( IndiaTechOnline photo)
 
Altera lowers the bar for cost-and-power-sensitive product design

Sharply targeting the cost-sensitive bandwidth needs of mobile video, voice, and data access,as well as the surge in demand for high-quality 3D images, programmable solutions leader Altera has unveiled its new Cyclone IV family of field programmable gate arrays (FPGAs) and a new version --9.1 -- of its associated Quartus II software.

Introducing Altera’s new offerings, India Country Manager, Gangatharan Gopal, said the new lineup would give Indian designers the option to incorporate the lowest ever power and cost into their offerings for the global product market, particularly in booming areas like smart phones, 3-D displays and broadcast video capture. While the devices themselves would cost as little as $ 3 or $ 6 equivalent for the 250 k units, the Quartus software would be available in ‘lite’ versions as a free download to kickstart creativity, he added.

The Cyclone IV FPGA family offers two variants:


Cyclone IV GX devices have up to 150K logic elements (LEs), up to 6.5-Mbits of RAM, up to 360 multipliers, and up to eight integrated 3.125-Gbps transceivers. By integrating transceivers, Cyclone IV GX FPGAs eliminate external component costs and reduce power consumption up to 30 percent compared to previous generation Cyclone products combined with external transceivers. With low power consumption and packages as small as 11x11 mm, these devices address cost-sensitive, small form-factor applications in the wireless, wireline, broadcast, industrial and consumer markets.


Cyclone IV E devices don’t have the transceivers but offer 25 percent power reduction in applications like handheld software-defined radio. The new Cyclone IV family will be supported in the Quartus II design software version 9.1 that is being simultaneously launched.

Tech note ( from Wikipedia): A field-programmable gate array (FPGA) is an integrated circuit designed to be configured by the customer or designer after manufacturing—hence "field-programmable". The FPGA configuration is generally specified using a hardware description language(HDL), similar to that used for an application-specific integrated circuit (ASIC) (circuit diagrams were previously used to specify the configuration, as they were for ASICs, but this is increasingly rare). FPGAs can be used to implement any logical function that an ASIC could perform. The ability to update the functionality after shipping, and the low non-recurring engineering costs relative to an ASIC design (not withstanding the generally higher unit cost), offer advantages for many applications.

FPGAs contain programmable logic components called "logic blocks", and a hierarchy of reconfigurable interconnects that allow the blocks to be "wired together"—somewhat like a one-chip programmable breadboard. Logic blocks can be configured to perform complex combinational functions, or merely simple logic gates like AND and XOR. In most FPGAs, the logic blocks also include memory elements, which may be simple flip-flops or more complete blocks of memory.

/Bangalore Nov 3 2009




    


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