New Delhi February 17 2013: The Indian government has green-flagged the setting up of two Semiconductor Wafer Fabrication (FAB) Manufacturing Facilities up by two business consortia, one including IBM and the other STM.
Letters of intent will be issued to the two consortia by March 31, 2014 and the final agreements are expected to be signed by August 2014. The proposed FABs are expected to create direct employment of about 22,000 and indirect employment of about 100,000.
Meanwhile South Korean Ambassador to India Joon-gyu Lee was quoted yesterday, saying Samsung and LG are considering setting up units to manufacture electronic chips in India.
Government incentives include:
-25% subsidy on capital expenditure and tax reimbursement as admissible under Modified Special Incentive Package Scheme (M-SIPS) Policy.
-Exemption of Basic Customs Duty (BCD) for non-covered capital items.
-200% deduction on expenditure on R&D as admissible under Section 35(2AB) of the Income Tax (IT) Act.
-Investment linked deductions under Section 35AD of the IT Act.
-Interest free loan of approx. Rs 51.240 billion each.
This is a culmination of a process that began in 2011 when government constituted an Empowered Committee (EC) to identify technology and investors and to recommend incentives to be provided to set up two FAB facilities in the country. The Empowered Committee had issued a Global Expression of Interest inviting technology providers and investors to set up the FAB facilities. This Committee submitted its recommendations to the Government in March 2013.
The two consortia:
Jaiprakash Associates Limited (with IBM, USA and Tower Semiconductor Limited, Israel as partners). Project Cost: Rs 343.99 billion. Technology: 90/65/45/28 nm. Capacity: 40,000 WSPM. Location: Yamuna Expressway, Uttar Pradesh
HSMC Technologies India Pvt. Ltd. (with ST Microelectronics and Silterra Malaysia Sdn. Bhd. as partners). Project Cost: Rs 290.13 billion. Technology: 90/65/45/28/22 nm. Capacity: 40,000 WSPM. Location: Prantij, Gujarat